View source for Host controller interface (USB, Firewire)

{{Short description|Software interface}}
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A '''USB and Firewire Host Controller Interface''' ('''UFHC''') is a register-level [[interface (computer science)|interface]] that enables a [[host controller]] for [[USB]] or [[IEEE 1394]] hardware to communicate with a host controller driver in software. The driver software is typically provided with an [[operating system]] of a [[personal computer]], but may also be implemented by application-specific devices such as a [[microcontroller]].
On the [[expansion card]] or motherboard controller, this involves much custom logic, with digital logic engines in the motherboard's controller chip, plus analog circuitry managing the high-speed differential signals. On the [[software]] side, it requires a [[device driver]] (called a Host Controller Driver, or HCD).
==IEEE 1394==
<!-- Section "IEEE 1394" linked to from redirects -->
==={{Anchor|OHCI}}Open Host Controller Interface===
'''Open Host Controller Interface''' ('''OHCI''')<ref>http://download.microsoft.com/download/1/6/1/161ba512-40e2-4cc9-843a-923143f3456c/ohci_11.pdf {{Bare URL PDF|date=March 2022}}</ref> is an [[open standard]].
[[File:VIA VT6307 Integrated Host Controller (100% Quality PNG) (49754559593).png|thumb|Die shot of a VIA VT6307 Integrated Host Controller used for IEEE 1394A communication]]
When applied to an [[IEEE 1394]] (also known as [[FireWire]]; [[i.LINK]] or '''Lynx''') card, OHCI means that the card supports a standard interface to the PC and can be used by the OHCI IEEE 1394 drivers that come with all modern [[operating system]]s. Because the card has a standard OHCI interface, the OS does not need to know in advance exactly who makes the card or how it works; it can safely assume that the card understands the set of well-defined commands that are defined in the standard [[protocol (computing)|protocol]].
==USB==
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===Open Host Controller Interface===
The OHCI standard for [[USB]] is similar to the OHCI standard for IEEE 1394, but supports USB 1.1 (full and low speeds) only; so as a result its register interface looks completely different. Compared with UHCI, it moves more intelligence into the controller, and thus is accordingly much more efficient; this was part of the motivation for defining it. If a computer provides non-x86 USB 1.1, or x86 USB 1.1 from a USB controller that is not made by Intel or VIA, it probably uses OHCI (e.g. OHCI is common on add-in PCI Cards based on an NEC chipset). It has many fewer intellectual property restrictions than UHCI.<ref name="LinuxUsbFaq">{{cite web|url=http://www.linux-usb.org/FAQ.html |title=Linux USB FAQ |author= |date=August 27, 2007 |accessdate=April 13, 2014}}</ref> It only supports 32-bit memory addressing,<ref name="ohci">{{Cite web |url=https://www.getusb.info/resources/hcir1_0a.pdf |title=Archived copy |access-date=2020-05-12 |archive-date=2020-05-18 |archive-url=https://web.archive.org/web/20200518185527/https://www.getusb.info/resources/hcir1_0a.pdf |url-status=dead }}</ref> so it requires an [[IOMMU]] or a computationally expensive [[bounce buffer]] to work with a 64-bit operating system.{{citation needed|date=March 2019}} OHCI interfaces to the rest of the computer only with [[memory-mapped I/O]].<ref name="ohci"/>
===Universal Host Controller Interface{{Anchor|UHCI}}===
'''Universal Host Controller Interface''' ('''UHCI''') is a [[proprietary hardware|proprietary]] interface created by Intel for [[Universal Serial Bus|USB]] 1.x (full and low speeds). It requires a license from Intel. A USB controller using UHCI does little in hardware and requires a software UHCI driver to do much of the work of managing the USB bus.<ref name="LinuxUsbFaq"/> It only supports 32-bit memory addressing,<ref name="uhci">{{cite web|url=http://ftp.netbsd.org/pub/NetBSD/misc/blymn/uhci11d.pdf |title=UHCI11D.DOC |website=Ftp.netbsd.org |accessdate=2017-01-10 }}</ref> so it requires an IOMMU or a computationally expensive bounce buffer to work with a 64-bit operating system.{{citation needed|date=March 2019}} UHCI is configured with port-mapped I/O and memory-mapped I/O, and also requires memory-mapped I/O for status updates and for data buffers needed to hold data that needs to be sent or data that was received.<ref name="uhci"/>
===Enhanced Host Controller Interface{{Anchor|EHCI}}===
The '''Enhanced Host Controller Interface''' ('''EHCI''')<ref name="EHCI">{{cite web|url= http://www.intel.com/content/www/us/en/io/universal-serial-bus/ehci-specification.html |title= Enhanced Host Controller Interface Specification |website= Intel.com |date= |accessdate= 2017-01-10}}</ref> is a high-speed controller standard applicable to USB 2.0. UHCI- and OHCI-based systems, as existed previously, entailed greater complexity and [[cost]]s than necessary. Consequently, the [[USB Implementers Forum]] (USB-IF) insisted{{when|date=February 2017}} on a public specification for EHCI. Intel hosted EHCI [[conformance testing|conformance-testing]] and this helped to prevent the incursion of proprietary features.
Originally a PC providing high-speed ports had two controllers, one handling low- and full-speed devices and the second handling high-speed devices. Typically such a system had EHCI and either OHCI or UHCI drivers. The UHCI driver provides low- and full-speed interfaces for Intel or VIA chipsets' USB host controllers on the motherboard, or for any VIA discrete host controllers attached to the computer's expansion bus. The OHCI driver provides low- and full-speed functions for USB ports of all other motherboard chipset vendors' integrated USB host controllers or discrete host controllers attached to the computer's expansion bus. The EHCI driver provided high-speed functions for USB ports on the motherboard or on the discrete USB controller. More recent hardware routes all ports through an internal "rate-matching" hub (RMH) that converts all traffic involving any directly-connected ports working at full-speed and low-speed between the high-speed traffic presented to the EHCI controller and the full-speed or low-speed traffic that the ports operating at those speeds expect, allowing the EHCI controller to handle these devices.
The EHCI software interface specification defines both 32-bit and 64-bit versions of its data structures,<ref name="EHCI"/> so it does not need a bounce buffer or [[IOMMU]] to work with a 64-bit operating system if a rate-matching hub is implemented to provide full-speed and low-speed connectivity instead of companion controllers using either the UHCI specification or OHCI specification, both of which are 32-bit only specifications.
===Extensible Host Controller Interface{{Anchor|xHCI}}===
{{Main|Extensible Host Controller Interface}}
'''Extensible Host Controller Interface''' ('''xHCI''') is the newest host controller standard that improves speed, power efficiency and virtualization over its predecessors. The goal was also to define a USB host controller to replace UHCI/OHCI/EHCI. It supports all USB device speeds (USB 3.1 SuperSpeed+, USB 3.0 SuperSpeed, USB 2.0 Low-, Full-, and High-speed, USB 1.1 Low- and Full-speed).
===Virtual Host Controller Interface{{Anchor|VHCI}}===
'''Virtual Host Controller Interface''' ('''VHCI''') refers to a virtual controller that may export virtual USB devices not backed by physical devices. For instance, on Linux, VHCI controllers are used to expose USB devices from other machines, attached using the [[USB/IP protocol]].
===USB4 Host Interface===
The Host Interface defined in the USB4 Specification. It makes operating system to manage USB4 Host Route for USB, DisplayPort, PCI Express, Thunderbolt or Host-to-Host Communication.
[https://www.usb.org/sites/default/files/2024-01/20240129%E3%80%90%E6%96%B0%E8%81%9E%E7%A8%BF%E3%80%91%E7%A5%A5%E7%A2%A9%E7%A7%91%E6%8A%80USB4%E4%B8%BB%E6%8E%A7%E7%AB%AF%E6%99%B6%E7%89%87ASM4242%E9%80%9A%E9%81%8EUSB%E5%8D%94%E6%9C%83%E8%AA%8D%E8%AD%89.pdf USB4® Host Controller ASM4242 Has Passed the USB-IF Certification]
==See also==
* [[Advanced Host Controller Interface]] (AHCI)
* [[Non-Volatile Memory Host Controller Interface]] (NVMHCI)
* [[Wireless USB]] (WHCI 1.0)
* [[RAID|RAID Controller]]
* [[Host adapter]]
* [[Low Pin Count|LPCIO]]
==References==
{{Reflist}}
==External links==
*[http://www.scaramanga.co.uk/stuff/qemu-usb/hcir1_0a.pdf An OHCI for USB standard document from Compaq, Microsoft and National Semiconductor] {{Webarchive|url=https://web.archive.org/web/20190824153407/http://www.scaramanga.co.uk/stuff/qemu-usb/hcir1_0a.pdf |date=2019-08-24 }}([[Portable Document Format|PDF]])
*Linux kernel source: [http://www.mjmwired.net/kernel/Documentation/usb/ohci.txt OHCI] and [http://www.mjmwired.net/kernel/Documentation/usb/ehci.txt EHCI] documentation
*[https://www.intel.com/content/www/us/en/io/universal-serial-bus/ehci-specification-for-usb.html Intel EHCI Specification]
*[https://www.intel.com/content/www/us/en/io/universal-serial-bus/extensible-host-controler-interface-usb-xhci.html Intel xHCI Specification]
{{DEFAULTSORT:Host Controller Interface}}
[[Category:Computer hardware standards]]
[[Category:USB]]