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{{Short description|Computer bus}}
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The '''STD Bus''' is a [[bus (computing)|computer bus]] that was used primarily for [[industrial control system]]s, but has also found applications in [[computing]]. The STD Bus has also been designated as '''STD-80''', referring to its relation to the [[Zilog Z80]] series [[microprocessor]]s. The term ''STD'' is in reference to "standard", but several marketing terms were also promulgated, including ''simple to design'', ''simple to debug'', and ''swift to deliver''.
==Description==
The STD Bus uses 6.5" by 4.5" [[expansion card]] with an [[edge connector]] with 56 pins. Many different types of cards have been available for the STD Bus, from processing cards, [[Random-access memory|RAM]] cards, [[Input/output|I/O]] cards, and specialized cards for various applications.
The use of the STD bus has declined. From the over one hundred manufacturers of components during its peak, vendor numbers have dwindled to under a dozen, but it is still used by hobbyists, manufacturers and in industrial applications.
==Connector pin assignments==
The STD Bus has a card edge connector with 56 contacts. The pin configuration is as follows. Flow is relative using an STD Bus processor card.<ref>Prolog 7801 8085A Processor Card Specifications September 1981</ref>
{| class="wikitable"
|-
! Pin !! [[Mnemonic]] !! Signal flow !! Description !! Pin !! Mnemonic !! Signal flow !! Description
|-
| 1 || +5V || In || Logic [[Voltage|power]] || 2 || +5V || In || Logic power
|-
| 3 || GND || In || Logic [[Ground (electricity)|ground]] || 4 || GND || In || Logic ground
|-
| 5 || -5V || In || Negative logic power || 6 || -5V || In || Negative logic power
|-
| 7 || D3 || In/out || [[Data (computing)|Data]] bus || 8 || D7 || In/out || Data bus
|-
| 9 || D2 || In/out || Data bus || 10 || D6 || In/out || Data bus
|-
| 11 || D1 || In/out || Data bus || 12 || D5 || In/out || Data bus
|-
| 13 || D0 || In/out || Data bus || 14 || D4 || In/out || Data bus
|-
| 15 || A7 || Out || [[Memory address|Address]] bus || 16 || A15 || Out || Address bus
|-
| 17 || A6 || Out || Address bus || 18 || A14 || Out || Address bus
|-
| 19 || A5 || Out || Address bus || 20 || A13 || Out || Address bus
|-
| 21 || A4 || Out || Address bus || 22 || A12 || Out || Address bus
|-
| 23 || A3 || Out || Address bus || 24 || A11 || Out || Address bus
|-
| 25 || A2 || Out || Address bus || 26 || A10 || Out || Address bus
|-
| 27 || A1 || Out || Address bus || 28 || A9 || Out || Address bus
|-
| 29 || A0 || Out || Address bus || 30 || A8 || Out || Address bus
|-
| 31 || WR || Out || Write to [[Computer memory|memory]] or [[I/O]] || 32 || RD || Out || Read to memory or I/O
|-
| 33 || IORQ || Out || I/O address select || 34 || MEMRQ || Out || Memory address select
|-
| 35 || IOEX || Out || I/O expansion || 36 || MEMEX || Out || Memory expansion
|-
| 37 || REFRESH || Out || Refresh timing || 38 || MCSYNC || Out || CPU machine cycle sync
|-
| 39 || STATUS 1 || Out || CPU status || 40 || STATUS 0 || Out || CPU status
|-
| 41 || BUSAK || Out || Bus acknowledge || 42 || BUSRQ || In || Bus request
|-
| 43 || INTAK || Out || [[Interrupt]] acknowledge || 44 || INTRQ || In || Interrupt request
|-
| 45 || WAITRQ || In || Wait request || 46 || NMIRQ || In || [[Mask (computing)|Non-maskable]] interrupt
|-
| 47 || SYSRESET || Out || System reset || 48 || PBRESET || In || Push button reset
|-
| 49 || CLK || Out || [[Clock signal|Clock]] from processor || 50 || CNTRL || In || Aux timing
|-
| 51 || PCO || Out || Priority chain out || 52 || PCI || In || Priority chain in
|-
| 53 || AUX GND || In || Aux ground || 54 || AUX GND || In || Aux ground
|-
| 55 || AUX +12V || In || Aux positive || 56 || AUX -12V || In || Aux negative
|}
==Applications==
A focus of the STD bus was its ability to build a system using the exact bus cards required for an application.  The compact size of a card made the STD bus system more adaptable to various applications than the contemporary computer buses of the mid-1980s such as the [[S-100 bus|S-100]] and the [[SS-50 bus|SS-50]], because it could use [[servo control]] cards along with a fully [[Computer programming|programmable computer]] for [[Operation (mathematics)|mathematical operations]].
In applications for running an [[Observatory|astronomical observatory]], the large industrial base of cards, and the system's expandability, made the system desirable for use in a [[Photometry (optics)|photometry]] lab to control the [[telescope]] as well as do the [[data logging]] and computations required.<ref>The STD Bus and other microcomputer buses for photometrists. By Russell M. Genet and Douglass J. Sauer. From the Fairborn Observatory in Fairborn Ohio.</ref>
In typical university laboratory settings of the mid - late 80's, STD bus data acquisition systems were commonplace using Z80 or similar processor cards for the data capture, processing and control, parallel I/O cards for experiment control as well as analogue to digital conversion cards for reading experiment analogue parameters. Such systems would only occupy minimal rack space, while providing full [[CP/M]] processing features.<ref>MICRO-LEARN: A low cost microprocessor development system for laboratory use based on the STD bus, Z-80 CPU and CP/M Operating system. By D. Crosetto(INFN, Turin), Zhong-Ren Gao(Beijing, Inst. Phys.)</ref>
==STD-32==
The STD-32 is a [[pin compatibility|pin compatible]] STD interface that allows the co-existence of both 8-bit and 32-bit systems on a single bus. This is accomplished by the addition of pins between the normal pins that do not connect, nor do they interfere with the original specification. This allows with the proper STD-32 [[backplane]] the ability to run [[legacy system|legacy]] cards used for specific applications on the same bus without having to upgrade the complete system.
==References==
{{Reflist}}
{{Computer-bus}}
[[Category:Computer buses]]