View source for VIDC20

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The '''VIDC20''' was a [[video display controller]] chip created as an accompanying chip to the [[ARM architecture|ARM]] CPU as used in [[RiscPC]] computer systems.<ref>[http://www.riscosopen.org/wiki/documentation/show/RiscPC%20Hardware description of RiscPC hardware]</ref><ref>[http://www.13thmonkey.org/documentation/ARM/VIDC20.ps.gz VIDC20 datasheet]</ref>
A simpler version of the VIDC20, the [[VIDC1]], was used in the earlier [[Acorn Archimedes]] computers.
A VIDC20 chip controls both the computer's video and sound.
The data is read from the 64-bit ARM data bus using [[Direct memory access|DMA]] control and then processed and converted into the necessary analogue signals to drive the video output displays and sound system. The VIDC20 can handle many more display and sound formats than the original VIDC1 chip found in the Archimedes hardware. It can also read data from [[Video random access memory|VRAM]] if installed in the machine, otherwise it reads from [[Dynamic random-access memory|DRAM]].
==Video==
Data from the [[Framebuffer|video buffer]] is converted and processed, as follows:
Data is serialised by the VIDC20 chip into either 1, 2, 4, 8, 16 or 32 [[Color depth|bits per pixel]], then passed through a colour [[Palette (computing)|look-up palette]] RAM.
The palette has 256 28-bit-wide registers: 8 red bits, 8 green bits, 8 blue bits and 4 bits for external data. The output is then converted by three 8-bit [[Digital-to-analog converter|DACs]], one each for red, green and blue colour. Output is then used to drive the display output device with a maximum of 16 million possible colours. The VIDC20 chip can handle any pixel rate up to 110&nbsp;MHz, with the clock selected from one of three sources, which can then be further divided by a factor between 1 and 8.
It also contains a phase comparator which allows for a single clock to generate all the required frequencies for any display mode.
==Sound==
Up to eight separate channels of [[Monaural|mono]] sounds are provided by the VIDC20 chip. The chip can work with 1, 2, 4 or 8 [[Stereophonic sound|stereo]] channels using time division multiplexing to synthesize left and right outputs. Each channel can be assigned a stereo position (between left to right).
Data from the buffer is converted and processed.
Data from the buffer is read at a programmable rate and passed to an 8-bit/16-bit DAC. The DAC uses the stereo image registers to convert the digital samples to a stereo analogue sample which is sent to the computer's internal amplifier
==Cursor==
The [[Cursor (user interface)|cursor]] data controller controls a 32-pixel-wide, and an unlimited number of pixels high, cursor. The pixels can be transparent or can be any three colors picked from the possible 16 million available colors.
==References==
{{reflist}}
[[Category:Graphics chips]]
[[Category:Acorn Computers]]
[[Category:RISC OS]]